Peishan Tu(涂沛杉Sharon)
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Peishan Tu(涂沛杉)PhD,
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About me (CV/中文简历)
I am the final year Ph.D student in the Department of Computer Science and Engineering, the Chinese University of Hong Kong, supervised by Prof. Evangeline F.Y. Young. I received my bachelor degree of Internet Engineering (2/80) in the School of Computer Science and Technology from Xidian University in 2014.
Research Areas
VLSI Computer-Aided Design(CAD)
Electronic Design Automation(EDA)
Physical Design
Placement and Routing
Publications
Journal
[J1] Chuangwen Liu, Peishan Tu, Pangbo Wu, Haomo Tang, Yande Jiang, Jian Kuang and Evangeline F.Y.Young, “An Effective Chemical Mechanical Polishing Filling Approach”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 21, no. 3, May, 2016
Conference
[C7] Peishan Tu, Chak-Wa Pui, Evangeline F.Y. Young, 'Simultaneous Timing Driven Tree Surgery in Routing with Machine Learning-based Acceleration’, ACM Great Lakes Symposium on VLSI (GLSVLSI 2018), Chicago, IL, USA, May 23-25, 2018.[pdf][slides]
[C6]Chak-Wa Pui, Peishan Tu, Haocheng Li, Gengjie Chen, Evangeline F.Y. Young, “A Two-Step Search Engine For Large Scale Boolean Matching Under NP3 Equivalence”, 23rd Asia and South Pacific Design Automation Conference(ASP-DAC 2018)
[C5] Gengjie Chen, Peishan Tu, Evangeline FY Young, “SALT: Provably Good Routing Topology by a Novel Steiner Shallow-Light Tree Algorithm”, In Proceedings of the 37th International Conference on Computer-Aided Design(ICCAD 2017)(Best Paper Award)
[C4] Peishan Tu, Wing-Kai Chow, Evangeline FY Young, “Timing driven routing tree construction”, System Level Interconnect Prediction (SLIP 2017), June 17, 2017(Best Paper Award)[pdf][slides]
[C3]Wing-Kai Chow, Jian Kuang, Peishan Tu, Evangeline FY Young, “Fence-aware detailed-routability driven placement”, System Level Interconnect Prediction (SLIP 2017), June 17, 2017
[C2] Chak-Wa Pui, Gengjie Chen, Wing-Kai Chow, Ka-Chun Lam, Jian Kuang, Peishan Tu, Hang Zhang, Evangeline F.Y. Young and Bei Yu,“RippleFPGA: a routability-driven placement for large-scale heterogeneous FPGAs”. In Proceedings of the 35th International Conference on Computer-Aided Design(ICCAD 2016) (p. 67). ACM.
[C1] Chuangwen Liu, Peishan Tu, Pangbo Wu, Haomo Tang, Yande Jiang, Jian Kuang and Evangeline F. Y.Young, “An Effective Chemical Mechanical Polishing Filling Approach ”, International Symposium on VLSI (ISVLSI 2015), July 8 - 10, 2015.
Awards & Honours
2016 1st Place in ICCAD 2016 NP3:Non-exact Projective NPNP Boolean Matching Contest
2016 2nd Place in ISPD 2016 Routability-Driven FPGA Placement Contest
2015 3rd Place in ICCAD 2015 Incremental Timing-driven Placement Contest
2015 3rd Place in ISPD 2015 Contest in Detailed Routing Driven Placement
2016 Excellent TA of Department of Computer Science and Technology in CUHK
2014 Full Postgraduate Studentship of the Chinese University of Hong Kong
2014 Excellent Graduate of Xidian University
2013 National Scholarship of China in Xidian University
Working Experience
May 2017--Sep 2017 Research Intern
Optimization Team, DSG, Cadence San Jose
Machine learning based clock tree latency estimation
Teaching Experience
CSCI3190 Introduction to Discrete Mathematics and Algorithms, 2016-2017 Fall
CSCI1020 Hands-on Introduction to C, 2015-2016 Spring
CSCI3190 Introduction to Discrete Mathematics and Algorithms, 2015-2016 Fall
CSCI1020 Hands-on Introduction to C, 2014-2015 Spring
CSCI3310 Mobile Computing and Applications Development, 2014-2015 Fall
Reviewer
ACM/IEEE Design Automation Conference (DAC)
ACM Great Lakes Symposium on VLSI (GLSVLSI)
Integration, the VLSI Journal
Microelectronics Journal
Journal of Circuits, Systems, and Computers (JCSC)